Smart Silicon: AI-Powered Chip Design Workshop
Join Us for an Workshop “Smart Silicon: AI-Powered Chip Design Workshop”
📅 Date: July 7th- 11th, 2025
📍 Location : San Diego, California, USA
Join Us for an Workshop “Smart Silicon: AI-Powered Chip Design Workshop”
📅 Date: July 7th- 11th, 2025
📍 Location : San Diego, California, USA
Dr. Sameer Shende
Research Professor and Director,
University of Oregon
Dr. Farhang Yazdani
President & CTO
BroadPak Corporation
Mr. Ganesan Narayanasamy
Founder and CEO - Object Automation System Solutions Inc, President of OpenPOWER Foundation, and Distinguished Faculty in California
Mr. Srini Vasan
President & CEO,
Quantum Ventura Inc
Dr. Pranose Jose Edavoor
Knowledge Associate
CDAC
Bengaluru
Dr. Abey Jacob
Scientist/Joint Director
CDAC
Bengaluru
Mr. Venkata Reddy Kolagatla
Scientist D
CDAC
Bengaluru
Mr. Aneesh Raveendran
Scientist D
CDAC
Bengaluru
Time | Topic & Speaker |
---|---|
Forenoon(9:00 AM – 12:00 PM) | Welcome & Introduction Keynote Address: Dr. Sameer Shende (University of Oregon) Topic: AI in Modern Chip Design |
Afternoon (2:00 PM – 5:00 PM) | Introduction to AI for Chip Design Hands-on Session: AI Tools for Chip Design |
Time | Topic & Speaker |
---|---|
Forenoon (9:00 AM – 12:00 PM) | Keynote Address: Mr. Ganesan Narayanasamy (Object Automation / OpenPOWER Foundation) Topic: Open-Source AI Platforms for Chip Design Session: Applying AI in Open Hardware Design |
Afternoon (2:00 PM – 5:00 PM) | Keynote Address: Mr. Srini Vasan (Quantum Ventura Inc) Topic: AI and Quantum Synergies in Chip Design Lab Session: AI-Based Design Verification |
Time | Topic & Speaker |
---|---|
Forenoon (9:00 AM – 12:00 PM) | Keynote Address: Dr. Pranose Jose Edavoor (CDAC Bengaluru) Topic: Design of AI Accelerators and Recent Advancements Session: CDAC’s Contributions to AI Hardware Design |
Afternoon (2:00 PM – 5:00 PM) | Keynote Address: Dr. Abey Jacob (CDAC Bengaluru) Topic: National Initiatives – Chips to Startup (C2S), DLI, and ChipIN Centres Talk: Building Design Capacity through Indian Semiconductor Programs |
Time | Topic & Speaker |
---|---|
Forenoon (9:00 AM – 12:00 PM) | Keynote Address: Mr. Venkata Reddy Kolagatla (CDAC Bengaluru) Topic: RTL to GDS – Leveraging AI in Physical Design Session: EDA Workflows under the C2S Program |
Afternoon (2:00 PM – 5:00 PM) | Keynote Address:Mr. Aneesh Raveendran (CDAC Bengaluru) Topic: Debugging and Yield Analysis Using AI Tools Practical Lab: Yield Prediction Techniques |
Time | Topic & Speaker |
---|---|
Forenoon (9:00 AM – 12:00 PM) | Group Project Presentations |
Afternoon (2:00 PM – 5:00 PM) | Expert Panel Discussion with All Speakers Certificate Distribution & Closing Remarks |